ASML 用光刻级套刻精度切入混合键合，难点在搬运而非对准
核心主张
ASML 的套刻精度是现成优势，真正的工程难点是把晶圆送到芯片上的搬运系统。
BESI/ASMPT 出身取放体系，擅长贴装但键合在退火时形成；ASML 从前道切入，套刻精度高一个数量级。随着键合间距变细，单位面积信号密度成为核心指标。
要点
两条路线
取放体系（BESI/ASMPT）对前道光刻体系（ASML）。
精度差异
ASML 已具备亚纳米套刻，高出约一个数量级。
关键指标
键合间距变细后，每平方毫米可容纳的信号数决定价值。
真正难点
不是套刻，而是把晶圆送到芯片上的搬运系统。
金句
ASML is bringing lithography-grade precision to hybrid bonding.
ASML 正把光刻级精度带入混合键合。
Its tools already do sub-nanometer overlay for lithography, easily an order of magnitude more precise.
它的设备已能做亚纳米级套刻，精度高出一个数量级不止。
Overlay isn’t ASML’s problem.
套刻不是 ASML 的难点。
后续观察
- ASML 混合键合设备的专利与产品进展
- HBM 采用时点是否仍在 2029 年之后
ASML is bringing lithography-grade precision to hybrid bonding.
“BESI, ASMPT and others come from a pick-and-place background. They’re very good at overlaying each die onto the base wafer and placing it down. The bond itself forms later, during the anneal.”
“ASML is coming at it from the front end. Its tools already do sub-nanometer overlay for lithography, easily an order of magnitude more precise. And as hybrid bond pitches get finer, how many signals you can fit per square millimeter between two dies matters more and more.”
“Overlay isn’t ASML’s problem. The challenge is building a system that brings the dies to the wafer, or in this case, the wafer to the die.”